Emulate more ioctl

1 files changed, 171 insertions, 0 deletions

diff --git a/drvemu.c b/drvemu.c
index 5d8f407..63c4998 100644
--- a/drvemu.c
+++ b/drvemu.c
@@ -34,6 +34,7 @@
 #include <sgxconfig.h>
 #include <sgx_mkif_km.h>
 #include <sgx_options.h>
+#include <sgxapi_km.h>
 
 #define DRM_IOCTL_PVR_SRVKM DRM_IOWR(PVR_DRM_SRVKM_CMD, PVRSRV_BRIDGE_PACKAGE)
 #include "pvr_ioctl.h"
@@ -68,6 +69,86 @@ int fcntl(int fd, int op, int arg) {
     return orig_fcntl(fd, op, arg);
 }
 
+PVRSRV_HEAP_INFO pvr_heaps[] = {
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_GENERAL_HEAP_ID),
+        .hDevMemHeap = (void*)1,
+        .sDevVAddrBase = {SGX_GENERAL_HEAP_BASE},
+        .ui32HeapByteSize = SGX_GENERAL_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_TADATA_HEAP_ID),
+        .hDevMemHeap = (void*)2,
+        .sDevVAddrBase = {SGX_TADATA_HEAP_BASE},
+        .ui32HeapByteSize = SGX_TADATA_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_MULTI_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_CODE_HEAP_ID),
+        .hDevMemHeap = (void*)3,
+        .sDevVAddrBase = {SGX_KERNEL_CODE_HEAP_BASE},
+        .ui32HeapByteSize = SGX_KERNEL_CODE_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_MULTI_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_KERNEL_DATA_HEAP_ID),
+        .hDevMemHeap = (void*)4,
+        .sDevVAddrBase = {SGX_KERNEL_DATA_HEAP_BASE},
+        .ui32HeapByteSize = SGX_KERNEL_DATA_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_MULTI_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_PIXELSHADER_HEAP_ID),
+        .hDevMemHeap = (void*)5,
+        .sDevVAddrBase = {SGX_PIXELSHADER_HEAP_BASE},
+        .ui32HeapByteSize = SGX_PIXELSHADER_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_SINGLE_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_VERTEXSHADER_HEAP_ID),
+        .hDevMemHeap = (void*)6,
+        .sDevVAddrBase = {SGX_VERTEXSHADER_HEAP_BASE},
+        .ui32HeapByteSize = SGX_VERTEXSHADER_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_SINGLE_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_PDSPIXEL_CODEDATA_HEAP_ID),
+        .hDevMemHeap = (void*)7,
+        .sDevVAddrBase = {SGX_PDSPIXEL_CODEDATA_HEAP_BASE},
+        .ui32HeapByteSize = SGX_PDSPIXEL_CODEDATA_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_SINGLE_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_PDSVERTEX_CODEDATA_HEAP_ID),
+        .hDevMemHeap = (void*)8,
+        .sDevVAddrBase = {SGX_PDSVERTEX_CODEDATA_HEAP_BASE},
+        .ui32HeapByteSize = SGX_PDSVERTEX_CODEDATA_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_SINGLE_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_SYNCINFO_HEAP_ID),
+        .hDevMemHeap = (void*)9,
+        .sDevVAddrBase = {SGX_SYNCINFO_HEAP_BASE},
+        .ui32HeapByteSize = SGX_SYNCINFO_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_MULTI_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_SHARED_3DPARAMETERS_HEAP_ID),
+        .hDevMemHeap = (void*)10,
+        .sDevVAddrBase = {SGX_SHARED_3DPARAMETERS_HEAP_BASE},
+        .ui32HeapByteSize = SGX_SHARED_3DPARAMETERS_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_MULTI_PROCESS,
+    },
+    {
+        .ui32HeapID = HEAP_ID( PVRSRV_DEVICE_TYPE_SGX, SGX_PERCONTEXT_3DPARAMETERS_HEAP_ID),
+        .hDevMemHeap = (void*)11,
+        .sDevVAddrBase = {SGX_PERCONTEXT_3DPARAMETERS_HEAP_BASE},
+        .ui32HeapByteSize = SGX_PERCONTEXT_3DPARAMETERS_HEAP_SIZE,
+        .ui32Attribs = PVRSRV_HAP_WRITECOMBINE | PVRSRV_MEM_RAM_BACKED_ALLOCATION | PVRSRV_HAP_SINGLE_PROCESS,
+    },
+};
+
 #define DEV_NAME "pvr"
 #define DEV_DATE "20110701"
 #define DEV_DESC "Imagination Technologies PVR DRM"
@@ -121,6 +202,96 @@ static bool pvrsrv_ioctl(int fd, PVRSRV_BRIDGE_PACKAGE *bridge_package) {
             get_misc_info(in->psMiscInfo);
             break;
         }
+        case _IOC_NR(PVRSRV_BRIDGE_SGX_GETCLIENTINFO): {
+            PVRSRV_BRIDGE_OUT_GETCLIENTINFO *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->sClientInfo.ui32ProcessID = getpid();;
+            out->sClientInfo.pvProcess = NULL;
+            PVRSRV_MISC_INFO *misc = &out->sClientInfo.sMiscInfo;
+            misc->ui32StatePresent = 0;
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_ENUM_CLASS): {
+            PVRSRV_BRIDGE_OUT_ENUMDEVICE *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->ui32NumDevices = 1;
+            out->asDeviceIdentifier[0].eDeviceType = PVRSRV_DEVICE_TYPE_SGX;
+            out->asDeviceIdentifier[0].eDeviceClass = PVRSRV_DEVICE_CLASS_3D;
+            out->asDeviceIdentifier[0].ui32DeviceIndex = 0;
+            out->asDeviceIdentifier[0].pszPDumpDevName = "";
+            out->asDeviceIdentifier[0].pszPDumpRegName = "";
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT): {
+            PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->hDevMemContext = (void*)0x2;
+            out->ui32ClientHeapCount = sizeof(pvr_heaps)/sizeof(*pvr_heaps);
+            memcpy(out->sHeapInfo, pvr_heaps, sizeof(pvr_heaps));
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_OPEN_DISPCLASS_DEVICE): {
+            PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE *out = bridge_package->pvParamOut;
+            out->hDeviceKM = (void*)0x1;
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_GET_DISPCLASS_INFO): {
+            PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->sDisplayInfo.ui32MaxSwapChains = 3;
+            out->sDisplayInfo.ui32MaxSwapChainBuffers = 3;
+            out->sDisplayInfo.ui32MinSwapInterval = 0;
+            out->sDisplayInfo.ui32MaxSwapInterval = 1;
+            out->sDisplayInfo.ui32PhysicalWidthmm = 256;
+            out->sDisplayInfo.ui32PhysicalHeightmm = 256;
+            strcpy(out->sDisplayInfo.szDisplayName, "Display");
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_ENUM_DISPCLASS_FORMATS): {
+            PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->ui32Count = 1;
+            out->asFormat[0].pixelformat = PVRSRV_PIXEL_FORMAT_A8R8G8B8_UNORM;
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_ENUM_DISPCLASS_DIMS): {
+            PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->ui32Count = 1;
+            out->asDim[0].ui32ByteStride = 256;
+            out->asDim[0].ui32Width = 256;
+            out->asDim[0].ui32Height = 256;
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_GET_DISPCLASS_SYSBUFFER): {
+            PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER *out = bridge_package->pvParamOut;
+            out->eError = PVRSRV_OK;
+            out->hBuffer = (void*)0x1234;
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_MAP_DEVICECLASS_MEMORY): {
+            PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY *in = bridge_package->pvParamIn;
+            PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY *out = bridge_package->pvParamOut;
+            printf("Attempting map 0x%x\n", (uint32_t)in->hDeviceClassBuffer);
+            out->eError = PVRSRV_OK;
+            out->sClientMemInfo.hMappingInfo = (void*)0x43214321;
+            //out->sClientSyncInfo = 0;
+            out->psKernelMemInfo = (void*)0xDEADBEEF;
+            out->hMappingInfo = (void*)0x12341234;
+            break;
+        }
+        case _IOC_NR(PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA): {
+            PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA *in = bridge_package->pvParamIn;
+            PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA *out = bridge_package->pvParamOut;
+            printf("Attempting mhandle map 0x%x\n", (uint32_t)in->hMHandle);
+            //out->eError = PVRSRV_OK;
+            //out->sClientMemInfo = ;
+            //out->sClientSyncInfo = 0;
+            //out->psKernelMemInfo = (void*)0xDEADBEEF;
+            //out->hMappingInfo = (void*)0x1;
+            break;
+        }
+
 #if 0
         case _IOC_NR(PVRSRV_BRIDGE_SGX_DEVINITPART2): {
             PVRSRV_BRIDGE_OUT_SGXDEVINITPART2 *out = bridge_package->pvParamOut;